A General Approach to Boolean Function Decomposition and its Application in FPGABased Synthesis

An effective logic synthesis procedure based on parallel and serial decomposition of a Boolean function is presented in this paper. The decomposition, carried out as the very first step of the .synthesis process, is based on an original representation of the function by a set of r-partitions over the set of minterms. Two different decomposition strategies, namely serial and parallel, are exploited by striking a balance between the two ideas. The presented procedure can be applied to completely or incompletely specified, single- or multiple-output functions and is suitable for different types of FPGAs including XILINX, ACTEL and ALGOTRONIX devices. The results of the benchmark experiments presented in the paper show that, in several cases, our method produces circuits of significantly reduced complexity compared to the solutions reported in the literature

Real-time On-board Object Tracking for Cooperative Flight Control

One of possible cooperative Situations for flights could be a scenario when the decision on a new path is taken by A Certain fleet member, who is called the leader. The update on the new path is Transmitted to the fleet members via communication That can be noisy. An optical sensor can be used as a back-up for re-estimating the path parameters based on visual information. For A Certain topology, the issue can be solved by continuous tracking of the leader of the fleet in the video sequence and re-adjusting parameters of the flight, accordingly. To solve such a problem of a real time system has been developed for Recognizing and tracking 3D objects. Any change in the 3D position of the leading object is Determined by the on-board system and adjustments of the speed, pitch, yaw and roll angles are made to sustain the topology. Given a 2D image acquired by an on-board camera, the system has to perform the background subtraction, recognize the object, track it and evaluate the relative rotation, scale and translation of the object. In this paper, a comparative study of different algorithms is Carried out based on time and accuracy constraints. The solution for 3D pose estimation is provided based on the system of invariant Zernike moments. The candidate techniques solving the complete set of procedures have been Implemented on Texas Instruments TMS320DM642 EVM board. It is shown That 14 frames per second can be processed; That supports the real time Implementation of the tracking system with the reasonable accuracy

Analytical Models for Distribution of the Envelope and Phase of Linearly Modulated Signals in AWGN Channel

In this paper, analytical expressions for the distribution of the envelope and phase of linearly modulated signals such as BPSK, M-PSK, and M-QAM in AWGN are presented. We perform numerical simulations for different orders of signal constellations. The results show that the proposed theoretical models are in excellent agreement with the estimated distributions from various numerical experiments

Significance of Logic Synthesis in FPGA-Based Design of Image and Signal Processing Systems

This chapter, taking FIR filters as an example, presents the discussion on efficiency of different implementation methodologies of DSP algorithms targeting modern FPGA architectures. Nowadays, programmable technology provides the possibility to implement digital systems with the use of specialized embedded DSP blocks. However, this technology gives the designer the possibility to increase efficiency of designed systems by exploitation of parallelisms of implemented algorithms. Moreover, it is possible to apply special techniques, such as distributed arithmetic (DA). Since in this approach, general-purpose multipliers are replaced by combinational LUT blocks, it is possible to construct digital filters of very high performance. Additionally, application of the functional decomposition-based method to LUT blocks optimization, and mapping has been investigated. The chapter presents results of the comparison of various design approaches in these areas

A Fast and Simple Algorithm for Computing M Shortest Paths in Stage Graph

We consider the problem of computing m shortest paths between a source node s and a target node t in a stage graph. Polynomial time algorithms known to solve this problem use complicated data structures. This paper proposes a very simple algorithm for computing all m shortest paths in a stage graph efficiently. The proposed algorithm does not use any complicated data structure and can be implemented in a straightforward way by using only array data structure. This problem appears as a sub-problem for planning risk reduced multiple k-legged trajectories for aerial vehicles

Discovery and Development of Small Molecule Allosteric Modulators of Glycoprotein Hormone Receptors

Glycoprotein hormones, follicle-stimulating hormone (FSH), luteinizing hormone (LH), and thyroid stimulating hormone (TSH) are heterodimeric proteins with a common subunit and hormone-specific subunit. These hormones are dominant regulators of reproduction and metabolic processes. Receptors for the glycoprotein hormones belong to the family of G-protein coupled receptors (GPCR). FSH receptor (FSHR) and LH receptor (LHR) are primarily expressed in somatic cells in ovary and testis to promote egg and sperm production in women & men respectively. TSH receptor (TSHR) is expressed in thyroid cells and regulates the secretion of T3 & T4. Glycoprotein hormones bind to the large extracellular domain of the receptor and cause a conformational change in the receptor that leads to activation of more than one intracellular signaling pathway. Several small molecules have been described to activate/inhibit glycoprotein hormone receptors through allosteric sites of the receptor. Small molecule allosteric modulators have the potential to be administered orally to patients thus improving the convenience of treatment. It has been a challenge to develop a small molecule allosteric agonist for glycoprotein hormones that can mimic the agonistic effects of the large natural ligand to activate similar signaling pathways. However, in the past few years, there have been several promising reports describing distinct chemical series with improved potency in preclinical models. In parallel, proposal of new structural model for FSH receptor and in silico docking studies of small molecule ligands to glycoprotein hormone receptors provide a giant leap on the understanding of the mechanism of action of the natural ligands and new chemical entities on the receptors. This review will focus on the current status of small molecule allosteric modulators of glycoprotein hormone receptors, their effects on common signaling pathways in cells, their utility for clinical application as demonstrated in preclinical models, and use of these molecules as novel tools to dissect the molecular signaling pathways of these receptors

Free Regions of Sensor Nodes

We introduce the notion of free region of a node in a sensor network. Intuitively, a free region of a node is the connected set of points R in its neighborhood such that the connectivity of the network remains the same when the node is moved to any point in R. We characterize several properties of free regions and develop an efficient algorithm for computing them. We capture free region in terms of related notions called in-free region and out-free region. We present an O(n2) algorithm for constructing the free region of a node, where n is the number of nodes in the network

Scheduling Architectures for DiffServ Networks with Input Queuing Switches

ue to its simplicity and scalability, the differentiated services (DiffServ) model is expected to be widely deployed across wired and wireless networks. Though supporting DiffServ scheduling algorithms for output-queuing (OQ) switches have been widely studied, there are few DiffServ scheduling algorithms for input-queuing (IQ) switches in the literaure. In this paper, we propose two algorithms for scheduling DiffServ DiffServ networks with IQ switches: the dynamic DiffServ scheduling (DDS) algorithm and the hierarchical DiffServ scheduling (HDS) algorithm. The basic idea of DDS and HDS is to schedule EF and AF traffic According to Their minimum service rates with the reserved bandwidth and schedule AF and BE traffic fairly with the excess bandwidth. Both DDS and HDS find a maximal weight matching but in different ways. DDS employs a Centralized scheduling scheme. HDS features a hierarchical scheduling scheme That Consists of two levels of schedulers: the central scheduler and port schedulers. Using such a hierarchical scheme, the Implementation complexity and the amount of information needs to be Transmitted between input ports and the central scheduler for HDS are dramatically reduced Compared with DDS. Through simulations, we show That both DDS and HDS popup Guarantees a minimum bandwidth for EF and AF traffic, as well as fair bandwidth allocation for BE traffic. The delay and jitter performance of the DDS is close to That of PQWRR, an existing DiffServ supporting scheduling algorithm for OQ switches. The tradeoff of the simpler Implementation scheme of HDS is its slightly worse delay performance Compared with DDS

A Graph-based Approach to Symbolic Functional Decomposition of Finite State Machines

This paper discusses the symbolic functional decomposition method for implementing finite state machines in field-programmable gate array devices. This method is a viable alternative to the presently widespread two-step approaches to the problem, which consist of separate encoding and mapping stages; the proposed method does not have a separate decomposition step instead, the state\u27s final encoding is introduced gradually on every decomposition iteration. Along with general description of the functional symbolic decomposition method\u27s steps, the paper discusses various algorithms implementing the method and presents an example realisation of the most interesting algorithm. In the end, the paper compares the results obtained using this method on standard benchmark FSMs and shows the advantages of this method over other state-of-the-art solutions

Implementation of Large Neural Networks Using Decomposition

The article presents methods of dealing with huge data in the domain of neural networks. The decomposition of neural networks is introduced and its efficiency is proved by the authors’ experiments. The examinations of the effectiveness of argument reduction in the above filed, are presented. Authors indicate, that decomposition is capable of reducing the size and the complexity of the learned data, and thus it makes the learning process faster or, while dealing with large data, possible. According to the authors experiments, in some cases, argument reduction, makes the learning process harder